Nitride semiconductor substrate and nitride semiconductor device using same

ABSTRACT

Polycrystalline AlN  3  is deposited on the surface of an SiO 2  film ( 2 ) by a sputtering method, and a mask is formed. An Si-doped n-GaN layer  5  is then formed over the mask thus formed. Subsequently, an n-type cladding layer ( 6 ), which is formed from Si-doped n-type Al 0.1 Ga 0.9 N (silicon concentration 4×10 17  cm −3 , thickness 1.2 μm), an n-type light-trapping layer ( 7 ), which is formed from Si-doped n-type GaN, a multiple quantum well layer ( 8 ), which is formed from an In 0.2 Ga 0.8 N well layer and an Si-doped In 0.05 Ga 0.95 N barrier layer, a cap layer ( 9 ), which is formed from Mg-doped p-type Al 0.2 Ga 0.8 N, a p-type light-trapping layer ( 10 ), which is formed from Mg-doped p-type GaN, a p-type cladding layer ( 11 ), which is formed from Mg-doped p-type Al 0.1 Ga 0.9 N, and a p-type contact layer ( 12 ), which is formed from Mg-doped p-type GaN, are grown in sequence to form an LD layer structure.

FIELD OF THE INVENTION

The present invention relates to a nitride semiconductor substrate and anitride semiconductor device employing same.

DESCRIPTION OF THE RELATED ART

When fabricating a device using a nitride semiconductor, it is importantto suppress threading dislocation in a semiconductor layer. With regardto a technique for suppressing such threading dislocation, a method isknown as disclosed in Japanese Laid-open patent publication 11-251253 inwhich selective growth is carried out using a masking material. Themethod disclosed in Japanese Laid-open patent publication 11-251253 isexplained below by reference to FIG. 7.

According to the method disclosed in this publication, a substrate inwhich a 1.2 μm thick GaN single film 112 is formed in advance on a(0001) face sapphire substrate 111 is prepared. An SiO₂ film is formedat a thickness of 200 nm on the surface of the GaN film 112, and dividedinto a mask 114 and a growth region 113 by a photolithographic processand wet etching. The growth region 113 and the mask 114 are formed instripes with widths of 5 μm and 2 μm respectively. The direction of thestripes is <11-20> (FIG. 7(a)).

A GaN film 115 that grows in the growth region 113 is formed by ahydride VPE method using ammonia (NH₃) gas as a Group V startingmaterial and gallium chloride (GaCl), which is a reaction productbetween hydrogen chloride (HCl) and the Group III starting materialgallium (Ga). Dichlorosilane (SiH₂Cl₂) is used as an n-type dopantmaterial. The substrate 111 is set in a hydride growth apparatus, andthe temperature is increased to a growth temperature of 1000° C. underan atmosphere of hydrogen. After the growth temperature is stabilized, afacet structure comprising a {1-101} face of the GaN film 115 is grownin the growth region 113 by supplying HCl at a flow rate of 20 cc/minfor about 5 minutes (FIG. 7 (b)). Growth is further carried out untilthe layer thickness reaches 140 μm while passing through the n-typedopant dichlorosilane (FIG. 7 (c), (d), (e)). In accordance with thistechnique, even when a GaN film of a few hundred microns is grown, a 2inch size wafer that is crack-free over the whole surface can beprovided. The dislocation density of the substrate is greatly reduced,and the dislocation density of the GaN single layer film 112, which wason the order of 10⁹/cm², can be reduced to on the order of 1×10⁷ to2×10⁷/cm².

SUMMARY OF THE INVENTION

However, even if the dislocation density is reduced by theabove-mentioned technique, there are still 1×10⁷ to 2×10⁷/cm²dislocations remaining. A dislocation density of 1×10⁷ to 2×10⁷/cm²corresponds to 100 to 200 dislocations per stripe of an LD device whenconsidering a semiconductor laser having a stripe width of 2 μm and aresonator length of 500 μm. It is known that dislocations shorten thedevice lifetime, and it is necessary to further reduce the dislocations.

It is an object of the present invention to provide a substrate ordevice that comprises a group III nitride semiconductor layer havingreduced dislocations and good quality.

In order to reduce the dislocations of the group III nitridesemiconductor layer, using a low dislocation substrate obtained by theprocess shown in FIG. 7, further forming a similar mask pattern thereon,and carrying out growth by metal-organic vapor phase epitaxy (MOVPE) canbe considered. FIG. 8 is a diagram showing a semiconductor layerstructure obtained by this method. This layer structure may be formed asfollows.

Firstly, an SiO₂ stripe mask 117 is formed in the <11-20>direction byuse of a substrate 116 described with reference to FIG. 7. Thedislocation density in the vicinity of the surface of the substrate 116is on the order of 2×10⁷/cm². The width of a mask opening 117 a is 2 μm,and the SiO₂ mask region is 18 μm. In MOVPE equipment Si-doped GaN isformed in the opening 117 a of a wafer having the above-mentioned maskformed thereon. The GaN layer that has grown in the mask openingcontinues to grow in the lateral direction and unites with an adjacentGaN layer via the mask (hereinafter, this portion is called a joined-upportion).

The GaN layer is planarized in this way to form an n-GaN layer 118. Ann-type cladding layer 119, which is formed from Si-doped n-typeAl_(0.1)Ga_(0.9)N (silicon concentration 4×10¹⁷ cm⁻³, thickness 1.2 μm),and an n-type light-trapping layer 120, which is formed from Si-dopedn-type GaN (silicon concentration 4×10¹⁷ cm⁻³, thickness 0.1 μm) aresubsequently formed on top of the n-GaN substrate 118. Further grown insequence on top thereof are a multiple quantum-well (MQW) layer 121(number of wells 3) formed from an In_(0.2)Ga_(0.8)N well layer(thickness 4 nm) and an Si-doped, In_(0.05)Ga_(0.95)N barrier layer(silicon concentration 5×10¹⁸ cm⁻³ thickness 6 nm), a cap layer 122formed from Mg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trappinglayer 123 formed from Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.1 μm), a p-type cladding layer 124 formed from Mg-dopedp-type Al_(0.1)Ga_(0.9)N (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.5μm), and a p-type contact layer 125 formed from Mg-doped p-type GaN (Mgconcentration 2×10¹⁷ cm⁻³, thickness 0.1 μm), thus forming an LDstructure.

In order to investigate the dislocation behavior of the LD layerstructure thus fabricated, a cross sectional cathodoluminescence (CL)image was examined, and the results are shown in FIG. 9. It is clearfrom FIG. 9 that there are a large number of dark spots and dark linespresent in the layer formed on the substrate. In a CL image, asdescribed in, for example, Sugahara, M. Hao, T. Wang, D. Nakagawa, Y.Naoi, K. Nishino, and S. Sakai, Jpn. J. Appl. Phys. vol. 37, no. 10B,pp. L1195-L1198, October 1998, places where dislocations are presentappear as dark spots since dislocations contribute to light not beingemitted. It is therefore thought that these dark lines and dark spotsrepresent dislocations. It has been found from the above that newdislocations are generated as a result of selective growth using asecond mask pattern. This phenomenon is thought to occur even in a casewhere a first mask pattern in FIG. 7 is used, but since the dislocationdensity in the substrate of the first mask pattern is very high, it cannot be distinguished by cross-sectional CL observation whether or notthere are newly generated dislocations.

FIG. 10 is a planar CL image, it which an InGaN luminescence image isobserved when applying an electron beam from above the sample of FIG. 8.In FIG. 10, a large number of dark lines are observed in the planar CLimage. This means that there are dislocations present within the InGaNlayer 121, which is formed from InGaN.

However, when the sample of FIG. 9 was actually examined using atransmission electron microscope, dislocations were also present in thein-plane direction of layers other than the multiple quantum-well (MQW)layer 121. In this way, it has become clear that, with regard to thelayer structure of FIG. 8, there is still room for further improvementin terms of device characteristics and device lifetime.

The behavior and cause of the occurrence of these dislocations areexplained below. Many dislocations present in the vicinity of the maskare thought to have many sources; for example, a dislocation that hasbent due to lateral growth of a dislocation inherited from thesubstrate, a dislocation generated at the interface between the mask andlaterally grown nitride semiconductor crystals, and a dislocationgenerated at the growth surface of a nitride semiconductor duringlateral growth. The first dislocation propagated from the substratedepends on the substrate dislocation density, but the occurrence ofother dislocations and the cause of these dislocations being introducedinto the device layer structure are thought to depend on the affinitybetween the masking material and the nitride semiconductor crystals andthe stress during growth. When the sample of FIG. 8 was subjected tocross-sectional TEM observation in the <11-20> direction, it wasconfirmed that a large number of dislocations were present in the<11-20> direction of the nitride semiconductor in the vicinity of themasking material. It is therefore surmised that the dislocations presenton the mask are bent in the <11-20> direction by the influence of stressdue to the mask, etc. A dislocation that has once been bent in the<11-20> direction runs through within the horizontal plane of thesubstrate and, for various reasons, slides in another direction withinthe horizontal plane (e.g., a direction equivalent to the <1-100>direction). It is surmised that this is the dislocation identified inFIG. 9 and in the cross-sectional TEM observation.

As a result of an investigation by the present inventors, it has beenfound that, in the sample of FIG. 8, a dislocation is propagated withinthe horizontal plane as described above, and such a dislocation is alsointroduced into the InGaN layer, which is an active layer.

That is, the following has been clarified as a result of theinvestigation by the present inventors;

-   -   (i) when a mask is provided on a low dislocation substrate and a        group III nitride semiconductor is grown thereon, many        dislocations develop from the vicinity of the mask, and    -   (ii) the development of this type of dislocation is marked when        a substrate having a low dislocation density is used.

Such a phenomenon becomes more apparent for a substrate in whichdislocations have been reduced to less than 10 ⁷/cm².

Although the reason for the above-mentioned phenomenon occurring is notentirely clear, it is surmised that, when the substrate dislocationdensity is high, many dislocations are present around a mask forre-growth, and these dislocations relieve the crystal strain, whereas ina substrate having a low dislocation density (e.g., less than 10⁷/cm²)such relief of the crystal strain occurs very little.

Based on such a conjecture, the present inventors have conceived theidea that, when a group III nitride semiconductor is mask-grown on a lowdislocation substrate, it is effective to intentionally form on the maska region that has the action of relieving crystal strain, and thepresent invention has thus been accomplished.

According to the present invention, there is provided a nitridesemiconductor substrate comprising a group III nitride semiconductorsubstrate, a mask formed over the group III nitride semiconductorsubstrate, and a semiconductor multilayer film formed above the mask, apolycrystalline material being deposited on the surface of the mask.

Furthermore, according to the present invention, there is provided anitride semiconductor device comprising a group III nitridesemiconductor substrate, a mask formed over the group III nitridesemiconductor substrate, and formed above the mask a semiconductormultilayer film that includes an active layer, a polycrystallinematerial being deposited on the surface of the mask.

In accordance with the present invention, the crystal strain on the maskis relieved by the action of the polycrystalline material deposited onthe surface of the mask, and as a result the crystal quality of thesemiconductor multilayer film formed above the mask is improved. In thissemiconductor device, since the mask having the polycrystalline materialdeposited on the surface thereof is provided underneath the activelayer, the quality of the active layer can be improved outstandingly.

As described above, according to the investigation by the presentinventors, when a substrate having relatively few dislocations such as agroup III nitride semiconductor substrate is used, dislocationsoccurring in the vicinity of the mask on the substrate become a problem.In accordance with the present invention, since such dislocations can bereduced effectively, the problem characteristic of such use of a groupIII nitride semiconductor substrate can be solved effectively whiletaking advantage of the use of a group III nitride semiconductorsubstrate.

The group III nitride semiconductor substrate of the present inventionpreferably has a dislocation density in the vicinity of the surfacethereof of 1×10⁷/cm² or less. The present invention solves effectivelythe problem characteristic of a case in which a semiconductor layer isgrown from a mask on such a low dislocation substrate, that is, theproblem that new dislocations develop in the vicinity of the mask, andwhen such a substrate is used, a more outstanding effect can beexhibited. The dislocation density of a substrate can be measured by amethod in which the surface of the substrate is treated with a liquidreagent so as to form etch pits and the density thereof is measured, amethod in which a cross section of a structure having a semiconductorlayer formed on a substrate is examined by an electron microscope, amethod in which a cathodoluminescence image is examined, etc. Thereamong, it is preferable to use the method employing cathodoluminescencebecause of the high measurement accuracy.

As hereinbefore described, according to the present invention, there isprovided a substrate or device comprising a group III nitridesemiconductor layer having reduced dislocations and good quality.

BRIEF DESCRIPTION OF THE DRAWINGS

The above-mentioned object, other objects, characteristics, andadvantages will become apparent from an explanation of a preferredembodiment that will be described below by reference to the attacheddrawings.

[FIG. 1] A sectional view of a semiconductor device related to anexample.

[FIG. 2] A sectional view of a semiconductor device related to anexample.

[FIG. 3] A sectional view of a semiconductor device related to anexample.

[FIG. 4] A sectional view of a semiconductor device related to anexample.

[FIG. 5] A sectional view of a semiconductor device related to anexample.

[FIG. 6] A sectional view of a semiconductor device related to anexample.

[FIG. 7] Sectional views showing steps of a process for fabricating aconventional semiconductor device.

[FIG. 8] A diagram showing a layer structure obtained by growing asemiconductor layer via a mask opening on top of a low dislocationsubstrate.

[FIG. 9] A diagram showing the result of examining a cross-sectionalcathodoluminescence (CL) image of the structure shown in FIG. 8.

[FIG. 10] A diagram showing the result of examining a planarcathodoluminescence (CL) image of the structure shown in FIG. 8.

DETAILED DESCRIPTION OF THE INVENTION

In the present invention, various materials can be used as apolycrystalline material. For example, it may be a material containingaluminum and nitrogen as essential elements. For example, a materialsuch as AlGaN, AlN, or InAlGaN may be used. When such a material isselected, a structure suitable for reducing crystal strain can beachieved.

The surface of a mask having the polycrystalline material formed thereonpreferably has a void structure. By so doing, it is possible to reducethe crystal strain still more effectively by the action of the voids.

In the present invention, the mask may be provided directly on thesurface of a group III nitride semiconductor substrate or via asemiconductor layer or an insulating layer. When the mask is provideddirectly on the surface of the substrate, the effect in reducing crystalstrain can be obtained more reliably.

The present invention exhibits a more outstanding effect when a groupIII nitride semiconductor substrate having a dislocation density in thevicinity of the surface of 1×10⁷ or less is used. As described above,the present invention is effective in suppressing dislocations thatdevelop from the vicinity of a mask on a low dislocation substrate. Withregard to the substrate having a dislocation density of 1×10⁷ or less,although dislocations originating from the substrate are reduced, thereis the problem that other dislocations due to crystal strain in thevicinity of the mask occur. Such a problem is particularly prominent inthe case of the above-mentioned low dislocation density substrate, butin accordance with the present invention, this problem can be solvedeffectively, and the problems characteristic of a case in which a lowdislocation substrate is used can be solved while taking advantage ofthe low dislocation substrate.

EXAMPLES

The present invention is explained in further detail below by referenceto examples. The examples below employed a substrate obtained, using asimilar method to that explained in FIG. 7, by growing a GaN film usinga mask that was thicker than usual. This mask has a mask width of 2 μmand a mask height of 1.7 μm, and a substrate having less surfacedislocations than one obtained by the method of FIG. 7 can be obtained.

A preferred embodiment of the nitride semiconductor substrate accordingto the present invention and a semiconductor laser fabricated byemploying same are explained below by reference to the examples.

Example 1

The structure of a semiconductor laser according to this example isshown in FIG. 1.

This semiconductor laser can be fabricated as follows. Firstly, an SiO₂film 2 is deposited on a GaN substrate 1 having a dislocation density inthe vicinity of the substrate of 9×10⁶/cm² by a CVD method or a plasmaCVD method. Subsequently, polycrystalline AlN 3 is deposited by asputtering method, and a resist stripe mask is formed in the <11-20>direction. The mask width is 18 μm and the opening width is 2 μm.

When the polycrystalline AlN 3 is formed, the following procedure iscarried out.

-   (i) After forming the SiO₂ film 2, a wafer is subjected to    ultrasonic cleaning with butanone and ethanol, washing with pure    water, etching with buffered hydrofluoric acid for 1 sec, washing    again with pure water, and then drying by blowing nitrogen.-   (ii) Subsequently, it is inserted into sputtering equipment and    deposition is carried out by AlN sputtering while maintaining the    substrate temperature at 50° C. or higher.

The polycrystalline AlN 3 and the SiO₂ film 2 are subsequently subjectedto etching by dry etching and wet etching methods so that the surface ofthe substrate is exposed at an opening 4.

Subsequently, Si-doped GaN is formed in the opening using theabove-mentioned mask-formed wafer in MOVPE equipment. With regard toMOVPE growth subsequent to the opening being formed, after first holdingthe substrate at 600° C. for 5 minutes while passing through ammoniagas, it is heated to 1080° C., which is the growth temperature for GaN,and after waiting for 30 seconds growth is started.

The GaN layer that is grown from the mask opening subsequently growslaterally and unites with an adjacent GaN layer via the mask(hereinafter, this portion is called a joined-up portion).

In this way the GaN layer is planarized, an n-GaN layer 5 is formed, anda semiconductor substrate comprising the mask having formed thereon thepolycrystalline AlN 3 is formed. Voids are introduced in the n-GaN layer5 around areas where the polycrystalline AlN 3 is formed.

In this example, growth of semiconductor layers is subsequently carriedout in succession to form a device. Firstly, an n-type cladding layer 6,which is formed from Si-doped n-type Al_(0.1)Ga_(0.9)N (siliconconcentration 4×10¹⁷ cm³, thickness 1.2 μm), an n-type light-trappinglayer 7, which is formed from Si-doped n-type GaN (silicon concentration4×10¹⁷ cm⁻³, thickness 0.1 μm), a multiple quantum-well (MQW) layer 8(number of wells 3), which is formed from an In_(0.2)Ga_(0.8)N(thickness 4 nm) well layer and an Si-doped In_(0.05)Ga_(0.95)N (siliconconcentration 5×10¹⁸ cm⁻³, thickness 6 nm) barrier layer, a cap layer 9,which is formed from Mg-doped p-type Al_(0.2)Ga_(0.8)N, a p-typelight-trapping layer 10, which is formed from Mg-doped p-type GaN (Mgconcentration 2×10¹⁷ cm⁻³, thickness 0.1 μm), a p-type cladding layer11, which is formed from Mg-doped p-type Al_(0.1)Ga_(0.9)N (Mgconcentration 2×10¹⁷ cm³, thickness 0.5 μm), and a p-type contact layer12, which is formed from Mg-doped p-type GaN (Mg concentration 2×10¹⁷cm⁻³, thickness 0.1 μm) are grown in sequence so as to form an LD layerstructure. A resist stripe mask is subsequently formed in the <11-20>direction by a standard exposure technique, and etching is carried outby a dry etching method so as to form a ridge 13. A p-electrode 14 madefrom Ni/Pt/Au is then formed on the p contact layer side, and ann-electrode 15 made from Ti/Al is formed on the n substrate side.

In this way, a wafer in which polycrystalline AlN is deposited on anSiO₂ masking material and selective growth is then carried out has avery low dislocation density on the mask. The dislocations in the<11-20> direction therefore also decrease, and dislocations present inthe laser structure layer above the mask can be reduced.

Example 2

The structure of a semiconductor laser according to this example isshown in FIG. 2.

This semiconductor laser can be fabricated as follows. Firstly, an SiO₂film 17 is deposited on a GaN substrate 16 having a dislocation densityin the vicinity of the substrate surface of 5×10⁵/cm², and a resiststripe mask is formed in the <11-20> direction. The mask width is 18 μmand the opening width is 2 μm. The mask is formed by etching the SiO₂film 17 by a wet etching method so that the substrate surface is exposedin the opening 19.

The mask thus formed is subjected to ultrasonic cleaning with butanoneand ethanol and washing with pure water. The wafer is then subjected toetching with buffered hydrofluoric acid for 1 sec, washing again withpure water, then washing with nitric acid at 100° C. for 30 minutes,washing again with pure water, and then drying by blowing nitrogen.

An Si-doped n-type Al_(0.05)Ga_(0.95)N layer 18 is formed, using MOVPEequipment, in the opening of the wafer having the mask formed thereon asdescribed above. In this process, the growth conditions are set so thatpolycrystalline AlGaN material is deposited on the SiO₂ mask. That is,the substrate is held and heated to 1080° C., which is the growthtemperature for AlGaN, while passing through ammonia gas, and afterwaiting for 60 seconds while passing through silane, growth is started.By so doing, polycrystalline AlGaN material is deposited on top of themask. Voids are introduced in the area around the AlGaN polycrystallinematerial.

In this stage, the substrate may be taken out from a film formationchamber to give a nitride semiconductor substrate, but in this examplegrowth of semiconductor layers is continued to form a device.

The substrate temperature is set at 1050° C., the AlGaN layer is grownlaterally, unites with an adjacent AlGaN layer, and is planarized toform an n-cladding (silicon concentration 4×10¹⁷ cm⁻³, thickness 2 μm)layer 20 from n-Al_(0.08)Ga_(0.92)N.

Subsequently, an n-type light-trapping layer 21, which is formed fromSi-doped n-type GaN (silicon concentration 4×10¹⁷ cm⁻³, thickness 0.1μm), a multiple quantum-well (MQW) layer 22 (number of wells 3), whichis formed from an In_(0.2)Ga_(0.8)N (thickness 4 nm) well layer and anSi-doped In_(0.05)Ga_(0.95)N (silicon concentration 5×10¹⁸ cm⁻³,thickness 6 nm) barrier layer, a cap layer 23, which is formed fromMg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trapping layer 24,which is formed from Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.1 μm), a p-type cladding layer 25, which is formed fromMg-doped p-type Al_(0.1)Ga_(0.9)N (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.5 μm), and a p-type contact layer 26, which is formed fromMg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.1 μm) aregrown in sequence so as to form an LD layer structure. A resist stripemask is subsequently formed in the <11-20> direction by a standardexposure technique, and etching is carried out by a dry etching methodso as to form a ridge 27. A p-electrode 28 made from Ni/Pt/Au is thenformed on the p contact layer side, and an n-electrode 29 made fromTi/Al is formed on the n substrate side.

In this way, a wafer in which polycrystalline AlGaN is deposited on anSiO₂ masking material when growing and selective growth is then carriedout has a very low dislocation density on the mask. Dislocations in the<11-20> direction therefore also decrease, and dislocations present inthe laser structure layer above the mask can be reduced.

Example 3

The structure of a semiconductor laser according to this example isshown in FIG. 3. This semiconductor laser can be fabricated as follows.Firstly, an SiO₂ film 31 is deposited on a GaN substrate 30 having adislocation density in the vicinity of the substrate surface of5×10⁶/cm², and a resist stripe mask is formed in the <11-20> direction.The mask width is 20 μm and the opening width is 2 μm. The SiO₂ film 31is subjected to etching by a wet etching method so that the surface ofthe substrate is exposed in an opening 32. An Si-doped n-typeAl_(0.05)Ga_(0.95)N layer 33 is formed, using MOVPE equipment, in theopening of the wafer having the above-mentioned mask. In this process,the substrate temperature is set at 500° C. or higher so thatpolycrystalline AlGaN material is deposited on the SiO₂ mask. The maskformed is subjected to the same processing as in Example 2 so that thepolycrystalline material is deposited appropriately. By so doing, thepolycrystalline AlGaN material is deposited on top of the mask. Voidsare introduced in the area around the polycrystalline AlGaN material.

In this stage, the substrate may be taken out from a film formationchamber to give a nitride semiconductor substrate, but in this examplegrowth of semiconductor layers is continued to form a device.

The substrate temperature is then set at 1050° C., the AlGaN layer isgrown laterally, unites with an adjacent AlGaN layer, and is planarizedto form an n-AlGaN layer 34. Subsequently, an Si-doped n-typeIn_(0.1)Ga_(0.8)N (silicon concentration 4×10¹⁷ cm³, thickness 0.1 μm)intermediate layer 35, an n-type cladding layer 36, which is formed fromSi-doped n-type Al_(0.07)Ga_(0.93)N (silicon concentration 4×10¹⁷ cm³,thickness 0.8 μm), an Si-doped n-type light-trapping layer 37, which isformed from Si-doped n-type GaN (silicon concentration 4×10¹⁷ cm⁻³,thickness 0.1 μm), a multiple quantum-well (MQW) layer 38 (number ofwells 3), which is formed from an In_(0.2)Ga_(0.8)N (thickness 4 nm)well layer and an Si-doped In_(0.05)Ga_(0.95)N (silicon concentration5×10¹⁸ cm⁻³, thickness 6 nm) barrier layer, a cap layer 39, which isformed from Mg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trappinglayer 40, which is formed from Mg-doped p-type GaN (Mg concentration2×10¹⁷ cm⁻³, thickness 0.1 μm), a p-type cladding layer 41, which isformed from Mg-doped p-type Al_(0.1)Ga_(0.9)N (Mg concentration 2×10¹⁷cm⁻³, thickness 0.5 μm), and a p-type contact layer 42, which is formedfrom Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.1μm) are grown in sequence so as to form an LD layer structure.

Subsequently, a resist stripe mask is formed in the <11-20> direction bya standard exposure technique, and etching is carried out by a dryetching method so as to form a ridge 43. A p-electrode 44 made fromNi/Pt/Au is then formed on the p contact layer side, and an n-electrode45 made from Ti/Al is formed on the n substrate side.

In this way, a wafer in which polycrystalline AlGaN is deposited on anSiO₂ masking material when growing and selective growth is then carriedout has a very low dislocation density on the mask. Dislocations in the<11-20> direction therefore also decrease, and dislocations present inthe laser structure layer above the mask can be reduced.

Example 4

This example shows a case in which a groove used for device separationis formed by selective growth. The structure of a semiconductor laseraccording to this example is shown in FIG. 4. This semiconductor lasercan be fabricated as follows. Firstly, an SiO₂ film 47 is deposited on aGaN substrate 46 having a dislocation density in the vicinity of thesubstrate of 9×10⁶/cm² by a CVD method. Subsequently, polycrystallineAlN 48 is deposited by a sputtering method and a resist stripe mask isformed in the <11-20> direction. The mask width is 30 μm and the openingwidth is 200 μm.

When the polycrystalline AlN 48 is formed, the following procedure iscarried out.

-   (i) After forming the SiO₂ film 2, a wafer is subjected to    ultrasonic cleaning with butanone and ethanol, washing with pure    water, etching with buffered hydrofluoric acid for 1 sec, washing    again with pure water, and then drying by blowing nitrogen.-   (ii) Subsequently, it is inserted into sputtering equipment and    deposition is carried out by AlN sputtering while maintaining the    substrate temperature at 50° C. or higher.

The polycrystalline AlN 48 and the SiO₂ film 47 are subsequentlysubjected to etching by dry etching and wet etching methods so that thesurface of the substrate is exposed at an opening 49. Si-doped GaN isformed, using MOVPE equipment, in the opening of the wafer having formedthereon the above-mentioned mask, and the GaN layer is grown laterally,unites with an adjacent GaN layer, and is planarized to form an n-GaNlayer 50.

In this way, the GaN layer is planarized, the n-GaN layer 50 is formed,and a semiconductor substrate comprising the mask having formed thereonthe polycrystalline AlN 48 is formed. Voids are introduced in the n-GaNlayer 50 around areas where the polycrystalline AlN 48 is formed.

Subsequently, an n-type cladding layer 51, which is formed from Si-dopedn-type Al_(0.1)Ga_(0.9)N (silicon concentration 4×10¹⁷ cm⁻³, thickness1.2 μm), an n-type light-trapping layer 52, which is formed fromSi-doped n-type GaN (silicon concentration 4×10¹⁷ cm⁻³, thickness 0.1μm), a multiple quantum-well (MQW) layer 53 (number of wells 3), whichis formed from an In_(0.2)Ga_(0.8)N (thickness 4 nm) well layer and anSi-doped In_(0.05)Ga_(0.95)N (silicon concentration 5×10¹⁸ cm⁻³,thickness 6 nm) barrier layer, a cap layer 54, which is formed fromMg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trapping layer 55,which is formed from Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.1 μm), a p-type cladding layer 56, which is formed fromMg-doped p-type Al_(0.2)Ga_(0.9)N (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.5 μm), and a p-type contact layer 57, which is formed fromMg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.1 μm) aregrown in sequence so as to form an LD layer structure. A resist stripemask is subsequently formed in the <11-20> direction by a standardexposure technique, and etching is carried out by a dry etching methodso as to form a ridge 58. Subsequently, an SiO₂ dielectric film 91 and ap-electrode 59 made from Ni/Pt/Au are formed on the p side, and ann-electrode 60 made from Ti/Al is formed on the n substrate side.Devices are then separated at the separation groove so as to givesemiconductor laser devices.

In this way, a wafer in which polycrystalline AlN is deposited on anSiO₂ masking material and selective growth is then carried out has avery low dislocation density on the mask. Dislocations in the <11-20>direction therefore also decrease, and dislocations present in the laserstructure layer above the mask can be reduced. Although the region wherethere is masking material and the region where the device has beenfabricated are separated from each other by on the order of 100 μm, oncea dislocation is generated, the dislocation is introduced within thelayer plane, and there is a large influence in this case. In practice,when a planar CL image of a sample having no polycrystalline layer abovethe mask was examined, a dislocation was present within the plane as inFIG. 10.

Example 5

The structure of a semiconductor laser according to this example isshown in FIG. 5. This semiconductor laser can be fabricated as follows.An SiO₂ film 62 is deposited on a GaN substrate 61 having a dislocationdensity in the vicinity of the substrate surface of 2×10⁶/cm², and aresist stripe mask is formed in the <11-20> direction. The mask width is40 μm and the opening width is 260 μm. The mask is formed by etching theSiO₂ film 62 by a wet etching method so that the substrate surface isexposed in the opening 64.

The mask thus formed is subjected to ultrasonic cleaning with butanoneand ethanol and washing with pure water. The wafer is then subjected toetching with buffered hydrofluoric acid for 1 sec, washing again withpure water, then washing with nitric acid at 100° C. for 30 minutes,washing again with pure water, and then drying by blowing nitrogen.

A cladding layer 65 made from Si-doped n-type Al_(0.06)Ga_(0.94)N layer(silicon concentration 4×10¹⁷ cm⁻³, thickness 2.5 μm) is formed, usingMOVPE equipment, in the opening of the wafer having the mask formedthereon as described above. In this process, growth conditions such asthe substrate temperature are set so that polycrystalline AlGaN 63 isdeposited on the SiO₂ mask. That is, the substrate is held and heated to1080° C., which is the growth temperature for AlGaN, while passingthrough ammonia gas, and after waiting for 60 seconds while passingthrough silane, growth is started. By so doing, polycrystalline AlGaNmaterial is deposited on top of the mask. Voids are introduced in thearea around the AlGaN polycrystalline material.

In this stage, the substrate may be taken out from a film formationchamber to give a nitride semiconductor substrate, but in this examplegrowth of semiconductor layers is continued to form a device.

Subsequently, an n-type light-trapping layer 66, which is formed fromSi-doped n-type GaN (silicon concentration 4×10¹⁷ cm³, thickness 0.1μm), a multiple quantum-well (MQW) layer 67 (number of wells 3), whichis formed from an In_(0.2)Ga_(0.8)N (thickness 4 nm) well layer and anSi-doped In_(0.05)Ga_(0.95)N (silicon concentration 5×10¹⁸ cm⁻³,thickness 6 nm) barrier layer, a cap layer 68, which is formed fromMg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trapping layer 69,which is formed from Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.1 μm), a p-type cladding layer 70, which is formed fromMg-doped p-type Al_(0.2)Ga_(0.8)N (Mg concentration 2×10¹⁷ cm⁻³,thickness 0.5 μm), and a p-type contact layer 71, which is formed fromMg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.1 μm) aregrown in sequence so as to form an LD layer structure. A resist stripemask is subsequently formed in the <11-20> direction by a standardexposure technique, and etching is carried out by a dry etching methodso as to form a ridge 72. Subsequently, an SiO₂ dielectric film 92 isdeposited on the p side, a p-electrode 73 made from Ni/Pt/Au is thenformed on the p contact layer side, and an n-electrode 74 made fromTi/Al is formed on the n substrate side. Devices are then separated at aseparation groove so as to give semiconductor laser devices.

In this way, a wafer in which polycrystalline AlGaN is deposited on anSiO₂ masking material when growing and selective growth is then carriedout has a very low dislocation density on the mask. Dislocations in the<11-20> direction therefore also decrease, and dislocations present inthe laser structure layer above the mask can also be reduced. Althoughthe area where the masking material is present and the area where thedevices are fabricated are separated from each other by on the order of130 μm, once a dislocation occurs, the dislocation is introduced withina layer plane, and there is therefore a large influence in this case.

Example 6

The structure of a semiconductor laser according to this example isshown in FIG. 6. In this example, an SiO₂ film 76 is deposited on a GaNsubstrate 75 having a dislocation density in the vicinity of thesubstrate surface of 9×10⁶/cm², and a resist stripe mask is formed inthe <11-20> direction. The mask width is 50 μm and the opening width is300 μm. The SiO₂ film 76 is subjected to etching by a wet etching methodso that the surface of the substrate is exposed in an opening 78, thusforming the mask.

The mask thus formed is subjected to ultrasonic cleaning with butanoneand ethanol and washing with pure water. The wafer is then subjected toetching with buffered hydrofluoric acid for 1 sec, washing again withpure water, then washing with nitric acid at 100° C. for 30 minutes,washing again with pure water, and then drying by blowing nitrogen.

Si-doped n-type Al_(0.05)Ga_(0.95)N is formed, using MOVPE equipment, inthe opening of the wafer having the above-mentioned mask formed thereon.In this process, the substrate temperature is set at 500° C. or higherso that polycrystalline AlGaN 77 is deposited on the SiO₂ mask.Specifically, the substrate is held and heated at 1080° C., which is thegrowth temperature for GaN, while passing through ammonia gas, and afterwaiting for 60 seconds while passing through silane growth is started.By so doing, the polycrystalline AlGaN material is deposited on top ofthe mask. Voids are introduced in the area around the polycrystallineAlGaN material.

In this stage, the substrate may be taken out from a film formationchamber to give a nitride semiconductor substrate, but in this examplegrowth of semiconductor layers is continued to form a device.

The substrate temperature is then set at 1050° C., and ann-Al_(0.05)Ga_(0.95)N layer 79 is formed. Subsequently, an Si-dopedn-type In_(0.1)Ga_(0.9)N (silicon concentration 4×10¹⁷ cm⁻³, thickness0.1 μm) intermediate layer 80, an n-type cladding layer 81, which isformed from Si-doped n-type Al_(0.07)Ga_(0.93)N (silicon concentration4×10¹⁷ cm⁻³, thickness 0.8 μm), an n-type light-trapping layer 82, whichis formed from Si-doped n-type GaN (silicon concentration 4×10¹⁷ cm⁻³,thickness 0.1 μm), a multiple quantum-well (MQW) layer 83 (number ofwells 3), which is formed from an In_(0.2)Ga_(0.8)N (thickness 4 nm)well layer and an Si-doped In_(0.05)Ga_(0.95)N (silicon concentration5×10¹⁸ cm⁻³, thickness 6 nm) barrier layer, a cap layer 84, which isformed from Mg-doped p-type Al_(0.2)Ga_(0.8)N, a p-type light-trappinglayer 85, which is formed from Mg-doped p-type GaN (Mg concentration2×10¹⁷ cm⁻³, thickness 0.1 μm), a p-type cladding layer 86, which isformed from Mg-doped p-type Al_(0.1)Ga_(0.9)N (Mg concentration 2×10¹⁷cm⁻³, thickness 0.5 μm), and a p-type contact layer 87, which is formedfrom Mg-doped p-type GaN (Mg concentration 2×10¹⁷ cm⁻³, thickness 0.1μm) are grown in sequence so as to form an LD layer structure.

Subsequently, a resist stripe mask is formed in the <11-20> direction bya standard exposure technique, and etching is carried out by a dryetching method so as to form a ridge 88. An SiO₂ dielectric film 93 isdeposited on the p side, ap-electrode 89 made from Ni/Pt/Au is thenformed on the p contact layer side, and an n-electrode 90 made fromTi/Al is formed on the n substrate side. Devices are then separated at aseparation groove so as to give semiconductor laser devices.

In this way, a wafer in which polycrystalline AlGaN is deposited on anSiO₂ masking material when growing and selective growth is then carriedout has a very low dislocation density on the mask. Dislocations in the<11-20> direction therefore also decrease, and dislocations present inthe laser structure layer above the mask can be reduced.

As hereinbefore explained by reference to the examples, when a nitridesemiconductor is grown on top of a wafer with a patterned maskingmaterial (SiO₂, etc.), forming polycrystals on top of the mask greatlydecreases the dislocation density on the mask. Therefore, since thedislocations are bent in the <11-20> direction by the stress of themask, etc., the dislocations are reduced and, furthermore, thedislocations that are bent from the <11-20> direction within the layerplane also decrease, thereby decreasing the dislocations present in thelaser structure layer above the mask. Among the examples, some usegrowth equipment as a method for forming polycrystals on top of a mask,which is effective in reducing the number of steps.

Although one embodiment of the present invention is explained above withreference to the drawings, this is an exemplification of the presentinvention, and various other constitutions may be employed.

For example, in the above-mentioned examples, SiO₂ was used as a maskingmaterial, but another masking material such as SiN_(x) or alumina may beused. The shape of the mask was a stripe pattern in the <11-20>direction, but it may be rectangular, circular, hexagonal, etc.

Furthermore, in order to reduce the dislocations, polycrystalline AlGaNwas formed on top of the mask, but the present invention should not beconstrued as being limited thereto, and polycrystallineAl_(x)In_(y)Ga_(1-x-y)N (0≦x≦1, 0≦y≦1) may be used.

Moreover, in the above-mentioned examples, a semiconductor laser wasexplained as an example, but the present invention may be applied toother light-emitting devices such as a light-emitting diode and,furthermore, to devices such as a photoreceptor and an electronicdevice.

The intermediate layer employed InGaN in the above-mentioned examples,but the present invention should not be construed as being limitedthereto, and Al_(x)In_(y)Ga_(1-x-y)N (0≦x≦1, 0≦y≦1) may be used.

1. A nitride semiconductor substrate comprising: a group III nitridesemiconductor substrate; a mask formed over the group III nitridesemiconductor substrate; and a semiconductor multilayer film formedabove the mask; the mask having a polycrystalline material deposited onthe surface thereof.
 2. The nitride semiconductor substrate according toclaim 1, wherein the polycrystalline material is formed from a materialcontaining aluminum and nitrogen as essential elements.
 3. The nitridesemiconductor substrate according to claim 1, wherein voids are formedon the surface of the mask having the polycrystalline material.
 4. Thenitride semiconductor substrate according to claim 1, wherein the maskis provided on the surface of the group III nitride semiconductorsubstrate.
 5. The nitride semiconductor substrate according to claim 1,wherein the group III nitride semiconductor substrate has a dislocationdensity in the vicinity of the surface thereof of 1×10⁷/cm² or less. 6.A nitride semiconductor device comprising: a group III nitridesemiconductor substrate; a mask formed over the group III nitridesemiconductor substrate; and a semiconductor multilayer film formedabove the mask, the semiconductor multilayer film including an activelayer; wherein the mask has a polycrystalline material deposited on thesurface thereof.
 7. The nitride semiconductor device according to claim6, wherein the polycrystalline material is formed from a materialcontaining aluminum and nitrogen as essential elements.
 8. The nitridesemiconductor device according to claim 6, wherein voids are formed onthe surface of the mask having the polycrystalline material.
 9. Thenitride semiconductor device according to claim 6, wherein the mask isprovided on the surface of the group III nitride semiconductorsubstrate.
 10. The nitride semiconductor device according to claim 6,wherein the group III nitride semiconductor substrate has a dislocationdensity in the vicinity of the surface thereof of 1×10⁷/cm² or less. 11.The nitride semiconductor device according to claim 6, wherein the maskis provided in the vicinity of a device separating plane of the nitridesemiconductor device.
 12. A process for producing a nitridesemiconductor substrate, the process comprising: a step of forming amask above a group III nitride semiconductor substrate; a step ofdepositing a polycrystalline material on the surface of the mask; and astep of forming a semiconductor multilayer film above the mask, thesemiconductor multilayer film including an active layer.
 13. The processfor producing a nitride semiconductor substrate according to claim 12,wherein the step of depositing the polycrystalline material on thesurface of the mask includes a step of depositing the polycrystallinematerial after bringing the surface of the mask into contact with anacid.
 14. The process for producing a nitride semiconductor substrateaccording to claim 12, wherein in the step of depositing thepolycrystalline material on the surface of the mask voids are formed onthe surface of the mask.
 15. The process for producing a nitridesemiconductor substrate according to claim 12, wherein the mask isprovided on the surface of the group III nitride semiconductorsubstrate.
 16. The process for producing a nitride semiconductorsubstrate according to claim 12, wherein the group III nitridesemiconductor substrate has a dislocation density in the vicinity of thesurface thereof of 1×10⁷/cm² or less.
 17. A process for producing anitride semiconductor device, the process comprising: a step of forminga mask above a group III nitride semiconductor substrate; a step ofdepositing a polycrystalline material on the surface of the mask; and astep of forming a semiconductor multilayer film above the mask, thesemiconductor multilayer film including an active layer.
 18. The processfor producing a nitride semiconductor device according to claim 17,wherein the step of depositing the polycrystalline material on thesurface of the mask includes a step of depositing the polycrystallinematerial after bringing the surface of the mask into contact with anacid.
 19. The process for producing a nitride semiconductor deviceaccording to claim 17, wherein in the step of depositing thepolycrystalline material on the surface of the mask voids are formed onthe surface of the mask.
 20. The process for producing a nitridesemiconductor device according to claim 17, wherein the mask is providedon the surface of the group III nitride semiconductor substrate.
 21. Theprocess for producing a nitride semiconductor substrate according toclaim 17, wherein the group III nitride semiconductor substrate has adislocation density in the vicinity of the surface thereof of 1×10⁷/cm²or less.